In this paper an analytical method for the electrothermal solution to the non-linear 3-D heat flow equation for multilayer structure electronic devices is proposed. Compared with previous models presented in literature, it is general and call be easily applied to a large variety of integrated devices, provided that their structure can be represented as an arbitrary number of superimposed layers with a 2-D embedded thermal source, so as to include the effect of the package. The proposed method is independent of the specific physical properties of the layers, hence GaAs MESFETs and HEMTs as well as silicon and silicon-on-insulator MOSFETs and heterostructure LASERs can be analysed. Moreover, it takes into account the dependence of the thermal conductivity of all the layers on the temperature; the heat equation is solved coupled with the device current-voltage relation in order to give physical consistence to the ex perimental evidence that a temperature increase causes a degradation of the electrical performances and that the electrical power is not uniformly distributed

An analytical method for the thermal layout optimisation of multilayer structure solid-state devices / Pesare, M.; Giorgio, A.; Perri, A. G.. - In: SOLID-STATE ELECTRONICS. - ISSN 0038-1101. - STAMPA. - 45:3(2001), pp. 511-517. [10.1016/S0038-1101(00)00282-3]

An analytical method for the thermal layout optimisation of multilayer structure solid-state devices

Giorgio, A.;Perri, A. G.
2001-01-01

Abstract

In this paper an analytical method for the electrothermal solution to the non-linear 3-D heat flow equation for multilayer structure electronic devices is proposed. Compared with previous models presented in literature, it is general and call be easily applied to a large variety of integrated devices, provided that their structure can be represented as an arbitrary number of superimposed layers with a 2-D embedded thermal source, so as to include the effect of the package. The proposed method is independent of the specific physical properties of the layers, hence GaAs MESFETs and HEMTs as well as silicon and silicon-on-insulator MOSFETs and heterostructure LASERs can be analysed. Moreover, it takes into account the dependence of the thermal conductivity of all the layers on the temperature; the heat equation is solved coupled with the device current-voltage relation in order to give physical consistence to the ex perimental evidence that a temperature increase causes a degradation of the electrical performances and that the electrical power is not uniformly distributed
2001
An analytical method for the thermal layout optimisation of multilayer structure solid-state devices / Pesare, M.; Giorgio, A.; Perri, A. G.. - In: SOLID-STATE ELECTRONICS. - ISSN 0038-1101. - STAMPA. - 45:3(2001), pp. 511-517. [10.1016/S0038-1101(00)00282-3]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/10498
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