This work exploits the well-known gmover IDmethodology to develop a novel approach to optimize the design of regulated cascode amplifiers (RgC). The proposed design framework starts extracting a set of lookup tables describing the circuit's figures of merit as a function of the gmover IDratio. Due to the feedback topology of the circuit, the performances, in terms of bandwidth, gain, and DC power consumption, exhibit a behavior that is counter-intuitive with respect to the typical tradeoffs suggested by the gm/IDtheory. The proposed method is validated designing a RGC with the 0.13 μm IHP SiGe process. The performance of the proposed solution are obtained through post-layout simulations.

A novel design optimization framework for regulated cascode transimpedance amplifiers / Piccinni, G.; Avitabile, G.; Coviello, G.; Talarico, C.. - (2017). (Intervento presentato al convegno European Conference on Circuit Theory and Design, ECCTD 2017 tenutosi a Catania, Italy nel September 4-6, 2017) [10.1109/ECCTD.2017.8093331].

A novel design optimization framework for regulated cascode transimpedance amplifiers

Piccinni, G.;Avitabile, G.;Coviello, G.;
2017-01-01

Abstract

This work exploits the well-known gmover IDmethodology to develop a novel approach to optimize the design of regulated cascode amplifiers (RgC). The proposed design framework starts extracting a set of lookup tables describing the circuit's figures of merit as a function of the gmover IDratio. Due to the feedback topology of the circuit, the performances, in terms of bandwidth, gain, and DC power consumption, exhibit a behavior that is counter-intuitive with respect to the typical tradeoffs suggested by the gm/IDtheory. The proposed method is validated designing a RGC with the 0.13 μm IHP SiGe process. The performance of the proposed solution are obtained through post-layout simulations.
2017
European Conference on Circuit Theory and Design, ECCTD 2017
978-1-5386-3974-0
A novel design optimization framework for regulated cascode transimpedance amplifiers / Piccinni, G.; Avitabile, G.; Coviello, G.; Talarico, C.. - (2017). (Intervento presentato al convegno European Conference on Circuit Theory and Design, ECCTD 2017 tenutosi a Catania, Italy nel September 4-6, 2017) [10.1109/ECCTD.2017.8093331].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/120818
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