Thermal and Electrical Layout Optimisation of Multilayer Structure Solid-State Devices based on the 2-D Fourier series

In this paper a 2-D Fourier transform-based analytical method for the thermal and electrical layout optimisation of multilayer structure solid-state devices is proposed. Compared with previous models presented in literature, it is general and can be easily applied to a large variety of integrated devices, provided that their structure can be represented as an arbitrary number of superimposed layers with a 2-D embedded thermal source, so as to include the effect of the package. The proposed method is independent of the specific physical properties of the layers, hence GaAs MESFETs and HEMTs as well as Silicon and Silicon-On-Insulator MOSFETs and heterostructure LASERs can be analysed. Moreover, it takes into account the dependence of the thermal conductivity of all the layers on the temperature; the heat equation is solved coupled with the device current-voltage relation in order to give physical consistence to the experimental evidence that a temperature increase causes a degradation of the electrical performances and that the electrical power is not uniformly distributed.