Coupling dithering and static linearization in a/d converters

This paper presents a study of the performance attainable by combining two different methods of linearization algorithms for A/D converters: dithering (which removes errors due to quantization) and static look-up table (which removes errors due to INL). The theory and the simulation results show two very important facts, i.e.: (i) the amplitude of the dither signal must be chosen according to the INL of the converter, and should be greater than the usual value of 0.5 LSB rms; (ii) using both the linearization techniques allows one to attain (in absence of other sources of error) an arbitrary high number of effective bits, proportional to the logarithm of the averaged samples.