A new integrated architecture for power measurements is proposed. The system includes the Hall sensor bias circuit and its front-end voltage amplifier. The implemented architecture performs the conversion of the electrical power into a Hall voltage, which is then amplified by a Differential Difference Amplifier (DDA). The architecture shows low power consumption and an optimized area however its resolution is drastically limited by the sensor offset and the linearity of the DDA. In order to achieve higher resolution, a second system is also proposed where a dynamic offset cancellation is employed in the bias scheme in order to reduce both the sensor and the electronics offset. To improve the sensor amplifier stage, a linearized version of the DDA is used. The latter architecture appears to be very promising and a linearity of 16-bit is achieved. Both simulations and measurements results from the comparison between the two architectures are shown in this paper.

Microelectronic System for Hall Sensor Power Measurements.

DE VENUTO, Daniela;
2004

Abstract

A new integrated architecture for power measurements is proposed. The system includes the Hall sensor bias circuit and its front-end voltage amplifier. The implemented architecture performs the conversion of the electrical power into a Hall voltage, which is then amplified by a Differential Difference Amplifier (DDA). The architecture shows low power consumption and an optimized area however its resolution is drastically limited by the sensor offset and the linearity of the DDA. In order to achieve higher resolution, a second system is also proposed where a dynamic offset cancellation is employed in the bias scheme in order to reduce both the sensor and the electronics offset. To improve the sensor amplifier stage, a linearized version of the DDA is used. The latter architecture appears to be very promising and a linearity of 16-bit is achieved. Both simulations and measurements results from the comparison between the two architectures are shown in this paper.
2nd IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2004.
0-7695-2081-2
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11589/15792
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