Design of CNTFETs Operating in High Speed Sub-Threshold Condition for Ultra-Low Power Applications

The aim of this paper is to simulate the behavior of Carbon NanoTube Field Effect Transistors (CNTFETs) operating in sub-threshold region for ultra-low power applications. In particular we propose the design of a SRAM cell based on CNTFET, in which we use a CNTFET model, already proposed by us. Then, for comparison purposes, the same design procedure is applied to characterize a SRAM cell based on CMOS technology, in which we use the BSIM4 model of the ADS library. In particular the MOSFET parameters are tuned by us through parametric simulations to obtain performance of the MOSFET model comparable to the CNTFET one.