Results from intensive investigation of a new so-called polynomial fitting method have demonstrated to be a promising technique for fast test of high-resolution ADC. Within this work, a recently developed CodeSimulink HW/SW codesign tool suitable to design, simulate and tune the digital HW required for the proposed method has been employed. The investigations have underlined the limits of the method and also allowed the introduction of possible improvements on the original technique, as shown in the paper.
A codesign tool to validate and improve an FPGA based test strategy for high resolution audio ADC / De Venuto, D.; Marchione, G.; Reyneri, L.. - STAMPA. - (2005), pp. 440-447. (Intervento presentato al convegno 6th International Symposium on Quality Electronic Design, ISQED 2005 tenutosi a San Jose, CA nel March 21-23, 2005) [10.1109/ISQED.2005.3].
A codesign tool to validate and improve an FPGA based test strategy for high resolution audio ADC
D. De Venuto;
2005-01-01
Abstract
Results from intensive investigation of a new so-called polynomial fitting method have demonstrated to be a promising technique for fast test of high-resolution ADC. Within this work, a recently developed CodeSimulink HW/SW codesign tool suitable to design, simulate and tune the digital HW required for the proposed method has been employed. The investigations have underlined the limits of the method and also allowed the introduction of possible improvements on the original technique, as shown in the paper.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
