The capabilities of a very low cost technology, fully compatible with a standard n-well CMOS process, have been exploited in the design of a programmable gain instrumentation amplifier. Suitable low noise and compact layout characteristics have been achieved by using lateral pnp transistors in the input differential stage of the opamp which constitutes the basic building block of the circuit. This solution allows a unity gain bandwidth of 20 MHz and an equivalent voltage input noise of 6.6 nv/√Hz@1 kHz for the core op amp. Gain programmability is provided by a variable integrated resistor whose value can be selected by means of a digital control circuitry on chip
Designing a Low Cost, Low Noise Programmable Gain Instrumentation Amplifier / Di Ciano, M.; Tangorra, R.; Marzocca, C.. - STAMPA. - (1996), pp. 1263-1266. (Intervento presentato al convegno 8th Mediterranean Electrotechnical Conference on Industrial Applications in Power Systems, Computer Science and Telecommunications (Melecon 96) nel May 13-16, 1996) [10.1109/MELCON.1996.551175].
Designing a Low Cost, Low Noise Programmable Gain Instrumentation Amplifier
C. Marzocca
1996-01-01
Abstract
The capabilities of a very low cost technology, fully compatible with a standard n-well CMOS process, have been exploited in the design of a programmable gain instrumentation amplifier. Suitable low noise and compact layout characteristics have been achieved by using lateral pnp transistors in the input differential stage of the opamp which constitutes the basic building block of the circuit. This solution allows a unity gain bandwidth of 20 MHz and an equivalent voltage input noise of 6.6 nv/√Hz@1 kHz for the core op amp. Gain programmability is provided by a variable integrated resistor whose value can be selected by means of a digital control circuitry on chipI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
