Cortical Activity Digitization by Symbolization in Brain-Computer Interface Context

In this paper, we propose and validate an innovative feature extraction (FE) algorithm, aiming to speed up 2-choices synchronous Brain-Computer Interfaces (BCIs). The main goal of the proposed solution is to realize a fast-neural interface, while preserving high accuracy and reliability values. The proposed BCI exploits signals from {mathrm {n=8}} EEG channels along the sensorimotor area. In this respect, it has been developed an ad hoc protocol to elicit a specific brain activity pattern: the Movement Related Potential (MRPs). EEG data undergo an innovative FE methodology known in the image-processing field as Local Binary Patterning (LBP), which analytically transforms experimental measurements into a series of binary strings. The LBP method reduces FE stage the computation complexity and timing, speeding up the real-time classification stages. The features from the LBP stage are used to train and feed a Serial Support Vector Machine (SSVM). The system has been implemented through a hybrid platform that comprises Simulink modelling and STM32L4 mu {mathrm {C}} programming. The here proposed BCI has been in-vivo tested on 6 subjects (aged 26pm 2). The results showed that the LBP-based BCI reaches an accuracy - on the two choices - of 84.98pm 1.27 % while the computing chain asks, on average, for just 271 ms after the stimulus to provide the classification.