Performance Evaluation of CNTFET-based Analog Circuits: A Review

In this paper we review a procedure to evaluate the performance of typical analog circuits based on CNTFET, both in SPICE, using ABM library, and in Verilog-A, using a semi-empirical compact model for CNTFETs already proposed by us. The obtained results, with reference to a design of a phase shift oscillator, are the same in static simulations and comparable in dynamic simulations. However using Verilog-A the simulation run time is much shorter and the software is much more concise and clear than schemes using ABM blocks in SPICE. At last we review the procedure for the design of basic and cascode current mirror both in CNTFET and MOS technology. For every simulation we evaluate parameters of merit in order to show the differences between CNTFET and MOS technology.