Analytical study of front-end circuits coupled to silicon photomultipliers for timing performance estimation under the influence of parasitic components

Full exploitation of the intrinsic fast timing capabilities of analog silicon photomultipliers (SiPMs) requires suitable front-end electronics. Even a parasitic inductance of a few nH, associated to the interconnections between the SiPM and the preamplifier, can significantly degrade the steepness of the detector response, thus compromising the timing accuracy. In this work, we propose a simple analytic expression for the single-photon response of a SiPM coupled to the front-end electronics, as a function of the main parameters of the detector and the preamplifier, taking into account the parasitic inductance. The model is useful to evaluate the influence of each parameter of the system on the slope of its response and to guide the designer in the definition of the architecture and the specifications for the front-end electronics. The results provided by the model have been successfully compared with experimental measurements from a front-end circuit with variable configuration based on a bipolar junction transistor (BJT), coupled to a 3 × 3 mm2 SiPM stimulated by a fast-pulsed laser source.