A parallel architecture, able to convolve in real-time long numerical sequences with long filter functions is shown. Real-time is intended as a processing made at the same frequency of the data input access with a minimum delay of the output production, in order to make the output immediately available during the input process. We have used a known scheme that assumes one processing element (PE) for each point of the filter sequence. This architecture is systolic and very modular. Input data are broadcasted in parallel on every PEs; shift registers are used to store the data as they are computed. Two interleaving levels are introduced. They have several advantages, by allowing a fixed-point data representation without precision loss, In this way, a very short "first-input-access/first-output-production" delay is obtained. The feasibility of the proposed architecture in the VLSI technology and its performance have been verified by a silicon compiler/simulator.

A fixed-point parallel convolver without precision loss for the real-time processing of long numerical sequences / Marino, Francescomaria. - STAMPA. - (1995), pp. 644-651. (Intervento presentato al convegno 7th IEEE Symposium on Parallel and Distributed Processing tenutosi a San Antonio, TX nel October 25-28, 1995) [10.1109/SPDP.1995.530743].

A fixed-point parallel convolver without precision loss for the real-time processing of long numerical sequences

Marino, Francescomaria
1995-01-01

Abstract

A parallel architecture, able to convolve in real-time long numerical sequences with long filter functions is shown. Real-time is intended as a processing made at the same frequency of the data input access with a minimum delay of the output production, in order to make the output immediately available during the input process. We have used a known scheme that assumes one processing element (PE) for each point of the filter sequence. This architecture is systolic and very modular. Input data are broadcasted in parallel on every PEs; shift registers are used to store the data as they are computed. Two interleaving levels are introduced. They have several advantages, by allowing a fixed-point data representation without precision loss, In this way, a very short "first-input-access/first-output-production" delay is obtained. The feasibility of the proposed architecture in the VLSI technology and its performance have been verified by a silicon compiler/simulator.
1995
7th IEEE Symposium on Parallel and Distributed Processing
0-81867195-5
A fixed-point parallel convolver without precision loss for the real-time processing of long numerical sequences / Marino, Francescomaria. - STAMPA. - (1995), pp. 644-651. (Intervento presentato al convegno 7th IEEE Symposium on Parallel and Distributed Processing tenutosi a San Antonio, TX nel October 25-28, 1995) [10.1109/SPDP.1995.530743].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/22797
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