A review on static and dynamic characterization of digital circuits in CNTFET and CMOS technology

In this paper we review a procedure to characterize digital circuits in CNTFET and CMOS technology in order to compare them. To achieve this goal, we use a semi-empirical compact CNTFET model, already proposed by us, and the BSIM4 model for MOS device. After a brief review of these models, as example, we review the static and dynamic characterization of NAND gate and Full Adder, using the software Advanced Design System (ADS) which is compatible with the Verilog-A programming language. The obtained results allow to highlight the differences between the two technologies.