Design and simulation of ternary logic circuits using CNTFETs

This paper shows how Carbon Nanotubes FETs (CNTFETs) can be used in the design of ternary logic gates, which is a promising alternative to the conventional binary logic design. In particular we propose a procedure to design some CNTFET-based logic gates, all in ternary logic. The main novelty is that in this paper all simulations are performed in Verilog-A, avoiding so the problems presented in SPICE. The obtained results are encouraging and demonstrate that CNTFET-based ternary logic gates can be a viable approach for the design of low-power, high-speed circuits.