We review a compact, semi-empirical model of Carbon Nanotube Field Effect Transistors (CNTFETs), in which we have proposed several issues to allow an easy implementation in the most common circuit simulators. The CNTFET equivalent circuit is similar to a common MOSFET one, where the quantum capacitances have been computed from the charge in the channel. A new procedure, based on a best-fitting between the measured and simulated values of output device characteristics, is proposed in order to extract the optimal values of the CNTFET equivalent circuit elements. Moreover, in order to utilize the proposed model also in the design of basic digital circuits, we have modified our model to characterize the I-V characteristics of CNTFETs below threshold. Finally we have implemented our model both in SPICE, using ABM library, and in Verilog-A in order to compare them. Typical analogue circuits and logic blocks have been simulated and results have been presented to validate the implementation of the proposed CNTFET model both in Verilog-A and in SPICE. The obtained results have been the same in static simulations and comparable in dynamic simulations, in which the differences are due to the better implementation in Verilog-A of the intrinsic capacitance model.

Modelling of CNTFETs for Computer Aided Design of A/D Electronic Circuits

PERRI, Anna Gina
2014

Abstract

We review a compact, semi-empirical model of Carbon Nanotube Field Effect Transistors (CNTFETs), in which we have proposed several issues to allow an easy implementation in the most common circuit simulators. The CNTFET equivalent circuit is similar to a common MOSFET one, where the quantum capacitances have been computed from the charge in the channel. A new procedure, based on a best-fitting between the measured and simulated values of output device characteristics, is proposed in order to extract the optimal values of the CNTFET equivalent circuit elements. Moreover, in order to utilize the proposed model also in the design of basic digital circuits, we have modified our model to characterize the I-V characteristics of CNTFETs below threshold. Finally we have implemented our model both in SPICE, using ABM library, and in Verilog-A in order to compare them. Typical analogue circuits and logic blocks have been simulated and results have been presented to validate the implementation of the proposed CNTFET model both in Verilog-A and in SPICE. The obtained results have been the same in static simulations and comparable in dynamic simulations, in which the differences are due to the better implementation in Verilog-A of the intrinsic capacitance model.
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11589/3664
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • Scopus 9
  • ???jsp.display-item.citation.isi??? 6
social impact