Two Fast Architectures for the Direct 2-D Discrete Wavelet Transform

In this paper, we propose two architectures for the direct two-dimensional (2-D) discrete wavelet transform (DWT), The first one is based on a modified recursive pyramid algorithm (MRPA) and performs a "nonstandard" decomposition (i.e., Mallet's tree) of an N x N image in approximately 2Na(2)/3 clock cycles (ccs), This result consistently speeds up other known architectures that commonly need approximately Na ccs, Furthermore, the proposed architecture is simpler than others in terms of hardware complexity. Subsequently, we show how "symmetric"/"anti-symmetric" properties of linear-phase wavelet filter bases can be exploited in order to further reduce the VLSI area. This is used to design a second architecture that provides one processing unit for each level of decomposition (pipelined approach) and performs a decomposition in approximately N-2/2 ccs, In many practical cases, even this architecture is simpler than general MRPA-based devices (having only one processing unit).