In the design procedure of complex digital sequential machines, it is useful to adopt the controllerdata path approach more than to implement a very high complexity sequential circuit. In this approach, all the functional and memory options are concentrated in an operative unit (data path) while the control signals are generated by a simpler sequential machine (controller). In order to compare this approach with the traditional one, the design of a control unit implemented in CMOS AMS 0.35 technology, for accessing one memory shared among different processors is performed. To specify the control sequences and data processing tasks of the designed digital system, a hardware algorithm has been adopted and the corresponding algorithm state machine chart has been indicated. Moreover, various specialized synthesis methods are studied and their behaviour has been simulated with orcad software tool. Both the circuit speed and the power dissipation for the different implementations have been evaluated and compared.
Synthesis of Finite State Machine adopting the controller-data path approach: performance evaluation of different methods / Rizzi, Maria; D'Aloia, M.; Castagnolo, B.. - In: INFORMATION TECHNOLOGY JOURNAL. - ISSN 1812-5638. - 6:6(2007), pp. 843-850. [10.3923/itj.2007.843.850]
Synthesis of Finite State Machine adopting the controller-data path approach: performance evaluation of different methods
RIZZI, Maria;
2007-01-01
Abstract
In the design procedure of complex digital sequential machines, it is useful to adopt the controllerdata path approach more than to implement a very high complexity sequential circuit. In this approach, all the functional and memory options are concentrated in an operative unit (data path) while the control signals are generated by a simpler sequential machine (controller). In order to compare this approach with the traditional one, the design of a control unit implemented in CMOS AMS 0.35 technology, for accessing one memory shared among different processors is performed. To specify the control sequences and data processing tasks of the designed digital system, a hardware algorithm has been adopted and the corresponding algorithm state machine chart has been indicated. Moreover, various specialized synthesis methods are studied and their behaviour has been simulated with orcad software tool. Both the circuit speed and the power dissipation for the different implementations have been evaluated and compared.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.