The paper describes an active module for phase control in Active Electronically Scanned Array (AESA) realized in 0.35 μm SiGe BiCMOS technology provided by the AustriaMicroSystem. The system is composed by a digital Phase Control Block (PCB) which generates the three channel square waves with a minimum phase shift of 0.3515° and an output frequency of 1.953MHz, and the PLLs with external VCOs. The system clock is equal to 2GHz. As expected from the simulations, the maximum phase error is less than 0.1° and the rms phase error is less than 0.06°. The complete system has been tested at 2.45 GHz and 3.8 GHz with almost the same maximum phase error and rms from the theory confirming the validity of the architecture.
A 10 bits three channels 0.35 um SiGe phase shifter
Coviello, Giuseppe;Avitabile, Gianfranco;Piccinni, Giovanni;Margiotta, Nicola
2016-01-01
Abstract
The paper describes an active module for phase control in Active Electronically Scanned Array (AESA) realized in 0.35 μm SiGe BiCMOS technology provided by the AustriaMicroSystem. The system is composed by a digital Phase Control Block (PCB) which generates the three channel square waves with a minimum phase shift of 0.3515° and an output frequency of 1.953MHz, and the PLLs with external VCOs. The system clock is equal to 2GHz. As expected from the simulations, the maximum phase error is less than 0.1° and the rms phase error is less than 0.06°. The complete system has been tested at 2.45 GHz and 3.8 GHz with almost the same maximum phase error and rms from the theory confirming the validity of the architecture.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
