This paper presents the optimized design of a conventional four-stage distributed amplifier for Ultra-Wide Band applications (UWB). The design flow exploits the gm/ID methodology in order to optimize the size of the transistors to achieve the best tradeoff between gain, input/output matching, noise figure and power DC consumption. The circuit was designed using a 0.13μm process from IHP Microelectronics, it exhibits a gain of 11 dB over the frequency range from 3.1 to 10.6 GHz and an average noise figure of 2.65 dB. The input/output return loss are lower than 16 dB and the amplifier dissipates only 26 mW with 1.2 V supply. Finally, the chip measures only 1.07 mm à 0.7 mm.
Gm over ID design for UWB distributed amplifier / Piccinni, G.; Avitabile, G.; Coviello, G.; Talarico, C.. - (2017). (Intervento presentato al convegno 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016 tenutosi a Abu Dhabi, UAE nel October 16-19, 2016.) [10.1109/MWSCAS.2016.7870069].
Gm over ID design for UWB distributed amplifier
Piccinni, G.;Avitabile, G.;Coviello, G.;
2017-01-01
Abstract
This paper presents the optimized design of a conventional four-stage distributed amplifier for Ultra-Wide Band applications (UWB). The design flow exploits the gm/ID methodology in order to optimize the size of the transistors to achieve the best tradeoff between gain, input/output matching, noise figure and power DC consumption. The circuit was designed using a 0.13μm process from IHP Microelectronics, it exhibits a gain of 11 dB over the frequency range from 3.1 to 10.6 GHz and an average noise figure of 2.65 dB. The input/output return loss are lower than 16 dB and the amplifier dissipates only 26 mW with 1.2 V supply. Finally, the chip measures only 1.07 mm à 0.7 mm.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
