This paper presents the optimized design of a conventional four-stage distributed amplifier for Ultra-Wide Band applications (UWB). The design flow exploits the gm/ID methodology in order to optimize the size of the transistors to achieve the best tradeoff between gain, input/output matching, noise figure and power DC consumption. The circuit was designed using a 0.13Î¼m process from IHP Microelectronics, it exhibits a gain of 11 dB over the frequency range from 3.1 to 10.6 GHz and an average noise figure of 2.65 dB. The input/output return loss are lower than 16 dB and the amplifier dissipates only 26 mW with 1.2 V supply. Finally, the chip measures only 1.07 mm Ã 0.7 mm.
|Titolo:||Gm over ID design for UWB distributed amplifier|
|Data di pubblicazione:||2017|
|Nome del convegno:||59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016|
|Digital Object Identifier (DOI):||10.1109/MWSCAS.2016.7870069|
|Appare nelle tipologie:||4.1 Contributo in Atti di convegno|