CNTFET-Based Design of Analogue Circuits

In this paper we implement a semi-empirical compact model for CNTFETs already proposed by us to simulate typical analogue circuits both in SPICE, using ABM library, and in Verilog-A. The obtained results are the same in static simulations and comparable in dynamic simulations. However using Verilog-A the simulation run time is much shorter and the software is much more concise and clear than schemes using ABM blocks in SPICE. Moreover we present, through the design of a basic current mirror, a comparison between CNTFET and MOS technology. For every simulation we evaluate parameters of merit in order to show the differences between CNTFET and MOS technology and the advantages of the first for analog VLSI circuits.