The large number of channels (15.7 millions), needed for the silicon pixel detector under development for the ALICE ITS, requires a careful study of the statistical fluctuations of the front-end electronics performance. By means of classical techniques, such as the Principal Component Analysis, and of new ones used to perform a “realistic” worst case analysis, various configurations of basic CMOS amplifier stages have been compared to evaluate the relative robustness of their performance against manufacturing fluctuations. To validate the simulated results on a significant statistical sample, a test pattern containing these basic building blocks has been designed and implemented in a 0.35mm process. In this work we present the theoretical results, achieved by applying the proposed Worst Case Analysis technique. The characterisation of the test chip prototypes is currently in progress.
|Autori interni:||MATARRESE, Gianvito|
|Titolo:||Relative Robustness Against Process Fluctuations of Basic Building Blocks for Analog Front-end of Particle Detectors|
|Data di pubblicazione:||1999|
|Nome del convegno:||Fifth Workshop on Electronics for LHC Experiments (LEB99)|
|Digital Object Identifier (DOI):||10.5170/CERN-1999-009.503|
|Appare nelle tipologie:||4.1 Contributo in Atti di convegno|