The large number of channels (15.7 millions), needed for the silicon pixel detector under development for the ALICE ITS, requires a careful study of the statistical fluctuations of the front-end electronics performance. By means of classical techniques, such as the Principal Component Analysis, and of new ones used to perform a “realistic” worst case analysis, various configurations of basic CMOS amplifier stages have been compared to evaluate the relative robustness of their performance against manufacturing fluctuations. To validate the simulated results on a significant statistical sample, a test pattern containing these basic building blocks has been designed and implemented in a 0.35mm process. In this work we present the theoretical results, achieved by applying the proposed Worst Case Analysis technique. The characterisation of the test chip prototypes is currently in progress.

Relative Robustness Against Process Fluctuations of Basic Building Blocks for Analog Front-end of Particle Detectors / Cantatore, Elio; Corsi, F; Marzocca, C; Matarrese, G. - STAMPA. - (1999), pp. 503-507. (Intervento presentato al convegno 5th Workshop on Electronics for LHC Experiments, LEB99 tenutosi a Snowmass, CO nel September 20-24,1999) [10.5170/CERN-1999-009.503].

Relative Robustness Against Process Fluctuations of Basic Building Blocks for Analog Front-end of Particle Detectors

Cantatore, Elio;Corsi, F;Marzocca, C;Matarrese, G
1999-01-01

Abstract

The large number of channels (15.7 millions), needed for the silicon pixel detector under development for the ALICE ITS, requires a careful study of the statistical fluctuations of the front-end electronics performance. By means of classical techniques, such as the Principal Component Analysis, and of new ones used to perform a “realistic” worst case analysis, various configurations of basic CMOS amplifier stages have been compared to evaluate the relative robustness of their performance against manufacturing fluctuations. To validate the simulated results on a significant statistical sample, a test pattern containing these basic building blocks has been designed and implemented in a 0.35mm process. In this work we present the theoretical results, achieved by applying the proposed Worst Case Analysis technique. The characterisation of the test chip prototypes is currently in progress.
1999
5th Workshop on Electronics for LHC Experiments, LEB99
92-9083-147-2
Relative Robustness Against Process Fluctuations of Basic Building Blocks for Analog Front-end of Particle Detectors / Cantatore, Elio; Corsi, F; Marzocca, C; Matarrese, G. - STAMPA. - (1999), pp. 503-507. (Intervento presentato al convegno 5th Workshop on Electronics for LHC Experiments, LEB99 tenutosi a Snowmass, CO nel September 20-24,1999) [10.5170/CERN-1999-009.503].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/13954
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