The paper illustrates a method for simultaneous ADC and DAC linearity testing in a loopback scheme. The main features of the method are: (i) it is statistically nearly optimal, being based on a maximum likelihood estimator; (ii) it does not require prior knowledge neither of the ADC nonlinearity, nor of the DAC nonlinearity - both are simultaneously measured relying only on a constant-variance noise. The performances of the method are studied both mathematically and via computer simulations. The method, because of its optimality and universality, appears to be also a good candidate for inclusion in technical standards relevant to ADC and DAC testing.
A Maximum Likelihood Estimator for ADC and DAC Linearity Testing / Cavone, Giuseppe; DI NISIO, Attilio; Giaquinto, Nicola; Savino, Mario. - (2008), pp. 1127-1132. (Intervento presentato al convegno 16th IMEKO TC4 International Symposium on Exploring New Frontiers of Instrumentation and Methods for Electrical and Electronic Measurements tenutosi a Florence, Italy nel September 22-24, 2008).
A Maximum Likelihood Estimator for ADC and DAC Linearity Testing
CAVONE, Giuseppe;DI NISIO, Attilio;GIAQUINTO, Nicola;SAVINO, Mario
2008
Abstract
The paper illustrates a method for simultaneous ADC and DAC linearity testing in a loopback scheme. The main features of the method are: (i) it is statistically nearly optimal, being based on a maximum likelihood estimator; (ii) it does not require prior knowledge neither of the ADC nonlinearity, nor of the DAC nonlinearity - both are simultaneously measured relying only on a constant-variance noise. The performances of the method are studied both mathematically and via computer simulations. The method, because of its optimality and universality, appears to be also a good candidate for inclusion in technical standards relevant to ADC and DAC testing.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
