A time domain technique for go-no-go testing of linear analog devices has been analysed in order to identify the conditions that maximise its sensitivity to structural and drift failures. The application to a commercial CMOS operational amplifier showing its ability to cover almost all of the assumed faults, and the ease of generation of the test stimulus on standard ATE equipments, suggest variable applications to production testing
A Fault Signature Approach to Analog Devices Testing / Corsi, F.; Chiarantoni, Michele; Lorusso, R.; Marzocca, C.. - STAMPA. - (1993), pp. 116-121. (Intervento presentato al convegno IEEE European Test Conference, ETC '93 tenutosi a Rotterdam, Netherlands nel April 19-22, 1993) [10.1109/ETC.1993.246526].
A Fault Signature Approach to Analog Devices Testing
F. Corsi;CHIARANTONI, MICHELE;C. Marzocca
1993-01-01
Abstract
A time domain technique for go-no-go testing of linear analog devices has been analysed in order to identify the conditions that maximise its sensitivity to structural and drift failures. The application to a commercial CMOS operational amplifier showing its ability to cover almost all of the assumed faults, and the ease of generation of the test stimulus on standard ATE equipments, suggest variable applications to production testingI documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
