A time domain technique for go-no-go testing of linear analog devices has been analysed in order to identify the conditions that maximise its sensitivity to structural and drift failures. The application to a commercial CMOS operational amplifier showing its ability to cover almost all of the assumed faults, and the ease of generation of the test stimulus on standard ATE equipments, suggest variable applications to production testing

A Fault Signature Approach to Analog Devices Testing

F. Corsi;CHIARANTONI, MICHELE;C. Marzocca
1993

Abstract

A time domain technique for go-no-go testing of linear analog devices has been analysed in order to identify the conditions that maximise its sensitivity to structural and drift failures. The application to a commercial CMOS operational amplifier showing its ability to cover almost all of the assumed faults, and the ease of generation of the test stimulus on standard ATE equipments, suggest variable applications to production testing
IEEE European Test Conference, ETC '93
0-8186-3360-3
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11589/15635
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