Designing Front-end Electronics for Solid-state Photomultipliers

Silicon Photomultipliers (SiPM) have shown to be excellent substitutes for more traditional and bulky Photomultiplier Tubes (PMT) in many photon detection applications, thanks essentially to their high quantum efficiency, low bias voltage and immunity to magnetic fields. However, they pose some challenging design constraints on the design of the electronic front-end (FE) due to their intrinsic high gain and speed. This is of particular concern when developing integrated multichannel electronics in deep submicron technologies. We report here on the realization of multi-channel ASICs in CMOS technology, based on a current-mode architecture, presenting also experimental results of the last prototype of the family.