This paper describes a technique for the formulation of the constraint equations in electrical networks containing ideal switches and characterized by a time variant topology. The proposed method is suitable for semi-qualitative analysis of switching circuits (switch with zero R-ON and infinite R-OfF) where a faster simulation is preferred to a precise one to focus only the behavioral performance of the circuit to analyze. In the proposed approach a set of overall constraint equations, the "Template Equations", are written at the start of the simulation.. The constraint equations, for each topological configuration produced by the ON/OFF switches, are derived by TE on the basis of simple operations. The advantage of the proposed approach consist into the capability to represent, in a single set of equations, circuits with time variant topology.
A topological approach to the analysis of switching circuits / Chiarantoni, Ernesto; Fornarelli, Girolamo; Vergura, S.. - STAMPA. - (2002), pp. 1285-1288. (Intervento presentato al convegno IEEE International Symposium on Industrial Electronics, ISIE 2002 tenutosi a L'Aquila, Italy nel July 8-11 , 2002).
A topological approach to the analysis of switching circuits
CHIARANTONI, Ernesto;Fornarelli, Girolamo;Vergura, S.
2002-01-01
Abstract
This paper describes a technique for the formulation of the constraint equations in electrical networks containing ideal switches and characterized by a time variant topology. The proposed method is suitable for semi-qualitative analysis of switching circuits (switch with zero R-ON and infinite R-OfF) where a faster simulation is preferred to a precise one to focus only the behavioral performance of the circuit to analyze. In the proposed approach a set of overall constraint equations, the "Template Equations", are written at the start of the simulation.. The constraint equations, for each topological configuration produced by the ON/OFF switches, are derived by TE on the basis of simple operations. The advantage of the proposed approach consist into the capability to represent, in a single set of equations, circuits with time variant topology.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.