In this paper we review a procedure in order to carry out static and dynamic analysis of basic digital circuits. At first, for static analysis, we implement a simple DC model for CNTFETs already proposed by us, verifying the validity of the obtained results through a comparison with those of Wong model. Then, to carry out the dynamic analysis, we consider both the quantum capacitance effects and the sub-threshold current. At last we analyze the timing performances of a NOT gate in order to define the optimal working conditions, emphasizing that the proposed method can be used to analyze the timing performance of any CNTFET-based logic gate.
Performance Evaluation of CNTFET-based Digital Circuits: A Review / Marani, Roberto; Perri, Anna Gina. - In: ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY. - ISSN 2162-8769. - STAMPA. - 9:5(2020). [10.1149/2162-8777/ab9b04]
Performance Evaluation of CNTFET-based Digital Circuits: A Review
Marani, RobertoSoftware
;Perri, Anna Gina
Conceptualization
2020-01-01
Abstract
In this paper we review a procedure in order to carry out static and dynamic analysis of basic digital circuits. At first, for static analysis, we implement a simple DC model for CNTFETs already proposed by us, verifying the validity of the obtained results through a comparison with those of Wong model. Then, to carry out the dynamic analysis, we consider both the quantum capacitance effects and the sub-threshold current. At last we analyze the timing performances of a NOT gate in order to define the optimal working conditions, emphasizing that the proposed method can be used to analyze the timing performance of any CNTFET-based logic gate.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
