The paper reports a highly repeatable 10-bits 3.8 GHz phase shifter implemented in a standard 0.35 μm SiGe technology for high precision applications. The prototype principle of operations and design are thoroughly described and demonstrated. The generated 0.35° phase step exhibits a rms error lower than 0.32°, mainly determined by the PLL inserted in the architecture.

High Precision Digital Based 3.8 GHz Phase Shifter / Cannone, F; Avitabile, Gianfranco; Coviello, G; Piccinni, G.. - (2015), pp. 275-278. (Intervento presentato al convegno IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015 tenutosi a Belgrade, Serbia nel 22-24 April 2015) [10.1109/DDECS2015.22].

High Precision Digital Based 3.8 GHz Phase Shifter

AVITABILE, Gianfranco;Coviello G;
2015-01-01

Abstract

The paper reports a highly repeatable 10-bits 3.8 GHz phase shifter implemented in a standard 0.35 μm SiGe technology for high precision applications. The prototype principle of operations and design are thoroughly described and demonstrated. The generated 0.35° phase step exhibits a rms error lower than 0.32°, mainly determined by the PLL inserted in the architecture.
2015
IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015
978-1-4799-6779-7
978-1-4799-6780-3
High Precision Digital Based 3.8 GHz Phase Shifter / Cannone, F; Avitabile, Gianfranco; Coviello, G; Piccinni, G.. - (2015), pp. 275-278. (Intervento presentato al convegno IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015 tenutosi a Belgrade, Serbia nel 22-24 April 2015) [10.1109/DDECS2015.22].
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/20102
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