This paper explores performance and technology-scalability of STT-MRAMs exploiting double-barrier MTJs (DMTJs) as comparatively evaluated with respect to conventional solution based on single-barrier MTJs (SMTJs). The comparative study was carried out at different design abstraction levels: (i) a bitcell-Ievel analysis relying on the use of Verilog-A compact models, and (ii) an architecture-level analysis for various memory sizes. Overall, our simulation results point out that, thanks to the reduced switching currents, DMTJ-based STT-MRAMs allow reducing write latency of about 60% than their SMTJ-based counterparts. This is achieved while assuring lower energy consumption under both write (-40%) and read (-27%) accesses, at the cost of reduced sensing margins.
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs / Garzón, Esteban; De Rose, Raffaele; Crupi, Felice; Trojman, Lionel; Finocchio, Giovanni; Carpentieri, Mario; Lanuzza, Marco. - STAMPA. - (2019), pp. 8795223.85-8795223.88. (Intervento presentato al convegno 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 tenutosi a Lausanne, Switzerland nel July 15-18, 2019) [10.1109/SMACD.2019.8795223].
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs
Mario Carpentieri;
2019-01-01
Abstract
This paper explores performance and technology-scalability of STT-MRAMs exploiting double-barrier MTJs (DMTJs) as comparatively evaluated with respect to conventional solution based on single-barrier MTJs (SMTJs). The comparative study was carried out at different design abstraction levels: (i) a bitcell-Ievel analysis relying on the use of Verilog-A compact models, and (ii) an architecture-level analysis for various memory sizes. Overall, our simulation results point out that, thanks to the reduced switching currents, DMTJ-based STT-MRAMs allow reducing write latency of about 60% than their SMTJ-based counterparts. This is achieved while assuring lower energy consumption under both write (-40%) and read (-27%) accesses, at the cost of reduced sensing margins.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
