In modern telecommunications systems, high frequencies lead to higher losses. One way to mitigate the path loss contribution is in the use of beam steering and beamforming techniques, which allow to improve the antenna system gain. Nowadays, the interest is put in adaptive systems, which steer the antenna pattern towards the position of a given target. In this work, we proposed a novel architecture for adaptive beam steering based on the Angle-of-Arrival (AoA) estimation. The phase shift is introduced in the Local Oscillator (LO) path thanks to a modified and lightweight DDS-PLL structure. After having described the architecture, the main dimensioning equations are presented. The architecture is validated through a Hardware-in-the-Loop (HiL) simulation campaign.
Adaptive Beamsteering Architecture Based on AoA Estimation with Phase Shift on LO-Path for 5G NR / Florio, Antonello; Coviello, Giuseppe; Talarico, Claudio; Avitabile, Gianfranco. - (2024), pp. 1-5. ( 9th International Conference on Smart and Sustainable Technologies, SpliTech 2024 University of Split, Faculty of Electrical Engineering, Mechanical Engineering and Naval Architecture (FESB) and Hotel Elaphusa, hrv 2024) [10.23919/splitech61897.2024.10612586].
Adaptive Beamsteering Architecture Based on AoA Estimation with Phase Shift on LO-Path for 5G NR
Florio, Antonello
;Coviello, Giuseppe;Talarico, Claudio;Avitabile, Gianfranco
2024
Abstract
In modern telecommunications systems, high frequencies lead to higher losses. One way to mitigate the path loss contribution is in the use of beam steering and beamforming techniques, which allow to improve the antenna system gain. Nowadays, the interest is put in adaptive systems, which steer the antenna pattern towards the position of a given target. In this work, we proposed a novel architecture for adaptive beam steering based on the Angle-of-Arrival (AoA) estimation. The phase shift is introduced in the Local Oscillator (LO) path thanks to a modified and lightweight DDS-PLL structure. After having described the architecture, the main dimensioning equations are presented. The architecture is validated through a Hardware-in-the-Loop (HiL) simulation campaign.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

