An Innovative Strategy for Common-Mode Voltage Reduction in Three-Phase Voltage-Source Inverters Based on Pulse Position Modulation

Three-phase two-level voltage-source inverters (VSIs), widely used in motor drives and photovoltaic systems for their versatility and efficiency, suffer from common-mode voltage (CMV) generation, leading to motor bearing failures and accelerated solar panel degradation due to induced leakage currents. While various hardware- and software-based techniques have been proposed to mitigate CMV, they often exhibit significant limitations. This article introduces a novel approach to reduce CMV using pulse position modulation (PPM). Unlike conventional pulse width modulation (PWM) techniques, the proposed method optimizes the placement of all pulses within their control periods, exploiting an increased number of degrees of freedom for improved harmonic control. The optimization relies on an analytical expression of CMV derived for PPM, enabling precise determination of optimal pulse positions to reduce CMV. Additionally, unlike traditional methods that often degrade output waveforms, the proposed strategy effectively reduces both CMV and phase current harmonic distortion simultaneously, maintaining competitiveness with the phase-shift method. Experimental validation demonstrates the superior performance of the proposed technique, achieving a 3% reduction in CMV and an 18.5% reduction in current distortion compared to the phase-shift method. This innovative approach addresses existing challenges and marks a significant advancement in inverter control strategies.