This paper reports a linearity test in which an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) with the same resolution are tested at the same time. The output levels of the DAC are dithered by a sinewave plus Gaussian noise, and acquired by the ADC. It is shown that a maximum likelihood (ML) estimator as well as a least squares (LS) estimator can be used to determine the code transition levels of the ADC, the output levels of the DAC and the parameters of the dithering signals. The root mean squared error (RMSE) of both estimators is compared with the Cramér-Rao lower bound (CRLB)
Simultaneous A/D and D/A converters linearity testing with deterministic dithering / DI NISIO, Attilio; Lanzolla, Anna Maria Lucia; Savino, Mario. - STAMPA. - (2011), pp. 208-212. (Intervento presentato al convegno IEEE International Instrumentation and Measurement Technology Conference, I2MTC 2011 tenutosi a Binjiang, Hangzhou, China nel May 10-12, 2011) [10.1109/IMTC.2011.5944236].
Simultaneous A/D and D/A converters linearity testing with deterministic dithering
DI NISIO, ATTILIO;LANZOLLA, Anna Maria Lucia;SAVINO, Mario
2011-01-01
Abstract
This paper reports a linearity test in which an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) with the same resolution are tested at the same time. The output levels of the DAC are dithered by a sinewave plus Gaussian noise, and acquired by the ADC. It is shown that a maximum likelihood (ML) estimator as well as a least squares (LS) estimator can be used to determine the code transition levels of the ADC, the output levels of the DAC and the parameters of the dithering signals. The root mean squared error (RMSE) of both estimators is compared with the Cramér-Rao lower bound (CRLB)I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
