A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15mV/fC and the dynamic range is 80fC. The simulated ENC is about 650e- for a detector capacitance of 10pF.

A new front-end ASIC for GEM detectors with time and charge measurement capabilities / Ciciriello, Fabio; Corsi, Francesco; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, Cristoforo; Matarrese, Gianvito; Ranieri, A.. - In: NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT. - ISSN 0168-9002. - 824:(2016), pp. 265-267. [10.1016/j.nima.2015.12.048]

A new front-end ASIC for GEM detectors with time and charge measurement capabilities

CICIRIELLO, Fabio;CORSI, Francesco;MARZOCCA, Cristoforo;MATARRESE, Gianvito;
2016-01-01

Abstract

A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15mV/fC and the dynamic range is 80fC. The simulated ENC is about 650e- for a detector capacitance of 10pF.
2016
A new front-end ASIC for GEM detectors with time and charge measurement capabilities / Ciciriello, Fabio; Corsi, Francesco; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, Cristoforo; Matarrese, Gianvito; Ranieri, A.. - In: NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT. - ISSN 0168-9002. - 824:(2016), pp. 265-267. [10.1016/j.nima.2015.12.048]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11589/83489
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