In this paper, a variation-aware simulation framework is introduced for hybrid circuits comprising MOS transistors and spintronic devices (e.g., magnetic tunnel junction-MTJ). The simulation framework is based on one-time characterization via micromagnetic multi-domain simulations, as opposed to most of existing frameworks based on single-domain analysis. As further distinctive capability, stochastic variations of the MTJ switching are explicitly incorporated through a Skew Normal distribution, which is adjusted to fit micromagnetic simulations. The framework is implemented in the form of Verilog-A look-up table based model, which assures easy integration with commercial circuit design tools, and very low computational effort. The framework is applied to non-volatile Flip-FIops as case study with 10,000 Monte Carlo runs.
A variation-aware simulation framework for hybrid CMOS/spintronic circuits / De Rose, Raffaele; Lanuzza, Marco; Crupi, Felice; Siracusano, Giulio; Tomasello, Riccardo; Finocchio, Giovanni; Carpentieri, Mario; Alioto, Massimo. - ELETTRONICO. - (2017), pp. 2484-2487. (Intervento presentato al convegno IEEE International Symposium on Circuits and Systems, ISCAS 2017 tenutosi a Baltimore, MD nel May 28-31, 2017) [10.1109/ISCAS.2017.8050920].
A variation-aware simulation framework for hybrid CMOS/spintronic circuits
Riccardo Tomasello;Mario Carpentieri;
2017-01-01
Abstract
In this paper, a variation-aware simulation framework is introduced for hybrid circuits comprising MOS transistors and spintronic devices (e.g., magnetic tunnel junction-MTJ). The simulation framework is based on one-time characterization via micromagnetic multi-domain simulations, as opposed to most of existing frameworks based on single-domain analysis. As further distinctive capability, stochastic variations of the MTJ switching are explicitly incorporated through a Skew Normal distribution, which is adjusted to fit micromagnetic simulations. The framework is implemented in the form of Verilog-A look-up table based model, which assures easy integration with commercial circuit design tools, and very low computational effort. The framework is applied to non-volatile Flip-FIops as case study with 10,000 Monte Carlo runs.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.